As semiconductor feature sizes continue to get smaller, semiconductor fabrication processes struggle to keep pace. One type of fabrication process involves exposure of a semiconductor wafer to a plasma or other foam of reactant gas to either deposit material on the wafer or remove material from the wafer. Smaller feature sizes demand more accurate material deposition and etching control, which in turn requires more accurate control of how the wafer is exposed to the plasma/reactant gas. These more accurate control requirements may include more accurate control of plasma uniformity across the wafer, more accurate control of plasma density across the wafer, and/or more accurate control of plasma residence time in exposure to the wafer, among others. It is in this context that the present invention is created.